In the near future new technologies will make it possible to enlarge the main memory layer in the current memory hierarchy using devices with small cost and access penalties, such as the Storage Class Memory (SCM). In order to use those technologies as efficiently as possible, we need to understand how the developer and the operating system can get the best performances while managing a new heterogeneous main memory, which consists of multiple types of memory with different volumes and different access speeds. We found that the most reasonable way to introduce these new technologies into any usable memory system would be by using a new automated layer that selects the most appropriate memory levels for allocating space in the memory complex, and that moves data between memory levels of the memory complex for optimizing performance in the fashion of paging algorithms. Specifically, we discovered that this memory management is optimized using a modification of the Aging algorithm (a directive of the LRU concept)-a modification which can improve the access speed of the heterogeneous main memory by about 75%, and that manages to achieve the same or better Hit/Miss ratio in almost all cases in comparison to the current alternatives.
|כותר פרסום המארח
|Proceedings - 45th International Conference on Parallel Processing Workshops, ICPPW 2016
|Institute of Electrical and Electronics Engineers Inc.
|מזהי עצם דיגיטלי (DOIs)
|פורסם - 23 ספט׳ 2016
|45th International Conference on Parallel Processing Workshops, ICPPW 2016 - Philadelphia, ארצות הברית
משך הזמן: 16 אוג׳ 2016 → 19 אוג׳ 2016
|Proceedings of the International Conference on Parallel Processing Workshops
|45th International Conference on Parallel Processing Workshops, ICPPW 2016
|16/08/16 → 19/08/16
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© 2016 IEEE.