TY - GEN
T1 - Memory-Aware Management for Heterogeneous Main Memory Using an Optimization of the Aging Paging Algorithm
AU - Oren, Gal
AU - Barenboim, Leonid
AU - Amar, Lior
N1 - Publisher Copyright:
© 2016 IEEE.
Copyright:
Copyright 2017 Elsevier B.V., All rights reserved.
PY - 2016/9/23
Y1 - 2016/9/23
N2 - In the near future new technologies will make it possible to enlarge the main memory layer in the current memory hierarchy using devices with small cost and access penalties, such as the Storage Class Memory (SCM). In order to use those technologies as efficiently as possible, we need to understand how the developer and the operating system can get the best performances while managing a new heterogeneous main memory, which consists of multiple types of memory with different volumes and different access speeds. We found that the most reasonable way to introduce these new technologies into any usable memory system would be by using a new automated layer that selects the most appropriate memory levels for allocating space in the memory complex, and that moves data between memory levels of the memory complex for optimizing performance in the fashion of paging algorithms. Specifically, we discovered that this memory management is optimized using a modification of the Aging algorithm (a directive of the LRU concept)-a modification which can improve the access speed of the heterogeneous main memory by about 75%, and that manages to achieve the same or better Hit/Miss ratio in almost all cases in comparison to the current alternatives.
AB - In the near future new technologies will make it possible to enlarge the main memory layer in the current memory hierarchy using devices with small cost and access penalties, such as the Storage Class Memory (SCM). In order to use those technologies as efficiently as possible, we need to understand how the developer and the operating system can get the best performances while managing a new heterogeneous main memory, which consists of multiple types of memory with different volumes and different access speeds. We found that the most reasonable way to introduce these new technologies into any usable memory system would be by using a new automated layer that selects the most appropriate memory levels for allocating space in the memory complex, and that moves data between memory levels of the memory complex for optimizing performance in the fashion of paging algorithms. Specifically, we discovered that this memory management is optimized using a modification of the Aging algorithm (a directive of the LRU concept)-a modification which can improve the access speed of the heterogeneous main memory by about 75%, and that manages to achieve the same or better Hit/Miss ratio in almost all cases in comparison to the current alternatives.
KW - Aging Algorithm
KW - Heterogeneous System
KW - Main Memory
KW - Memory Hierarchies
KW - Paging
KW - Storage Class Memory
UR - http://www.scopus.com/inward/record.url?scp=84990945102&partnerID=8YFLogxK
U2 - 10.1109/ICPPW.2016.29
DO - 10.1109/ICPPW.2016.29
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AN - SCOPUS:84990945102
T3 - Proceedings of the International Conference on Parallel Processing Workshops
SP - 98
EP - 105
BT - Proceedings - 45th International Conference on Parallel Processing Workshops, ICPPW 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 45th International Conference on Parallel Processing Workshops, ICPPW 2016
Y2 - 16 August 2016 through 19 August 2016
ER -