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Constructing a reliable test&set bit

  • Frank Stomp
  • , Gadi Taubenfeld

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

A reliable test&set bit is constructed from a collection of test&set bits of which some may be faulty. Faults, called omission faults, are modeled by allowing operations on the faulty bits to return a special distinguished value. The test&set bits are studied without a reset operation which can tolerate one omission fault only. There exist a general technique t faults from test&set bits which can tolerate only one fault. Also, there exists a general technique to convert a test&set bit without a reset operation into one which supports a reset.

Original languageEnglish
Title of host publicationPODC 1996
Subtitle of host publicationProceedings of the fifteenth annual ACM symposium on Principles of distributed computing
PublisherACM
Pages177
Number of pages1
ISBN (Print)9780897918008
DOIs
StatePublished - 1 May 1996
Externally publishedYes
Event15th Annual ACM Symposium on Principles of Distributed Computing, PODC 1996 - Philadelphia, PA, USA
Duration: 23 May 199626 May 1996

Publication series

NameProceedings of the Annual ACM Symposium on Principles of Distributed Computing

Conference

Conference15th Annual ACM Symposium on Principles of Distributed Computing, PODC 1996
CityPhiladelphia, PA, USA
Period23/05/9626/05/96

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