Abstract
A reliable test&set bit is constructed from a collection of test&set bits of which some may be faulty. Faults, called omission faults, are modeled by allowing operations on the faulty bits to return a special distinguished value. The test&set bits are studied without a reset operation which can tolerate one omission fault only. There exist a general technique t faults from test&set bits which can tolerate only one fault. Also, there exists a general technique to convert a test&set bit without a reset operation into one which supports a reset.
| Original language | English |
|---|---|
| Pages | 177 |
| Number of pages | 1 |
| DOIs | |
| State | Published - 1996 |
| Externally published | Yes |
| Event | Proceedings of the 1996 15th Annual ACM Symposium on Principles of Distributed Computing - Philadelphia, PA, USA Duration: 23 May 1996 → 26 May 1996 |
Conference
| Conference | Proceedings of the 1996 15th Annual ACM Symposium on Principles of Distributed Computing |
|---|---|
| City | Philadelphia, PA, USA |
| Period | 23/05/96 → 26/05/96 |
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